Unfortunately my Genny carts are in storage so I can't help you directly, but generally how it works is that A21 (and A20 if there are two ROMs) is connected to the select inputs of a 74xx139 or similar decoder chip, and SRAM reads are decoded just like ROM reads (i.e. !C_CE enables the 139 which enables the appropriate chip for the address range). Since the SRAM is generally only 8 bits wide, it is only connected to half of the data bus. For reads, the reads are simply done in byte mode so that the 68K masks off the unused half of the bus. For writes, there are two write signals called !UDSW and !LDSW (Upper Data Set Write and Lower Data Set Write) that each correspond to one half of the data bus (and thus even and odd addresses). I don't recall what the correspondence is among !UDSW/!LDSW, the halves of the data bus, and even/odd addresses. I haven't seen how this signal is used, but it's probably just connected directly to the SRAM's !WE input.
Typically, what you will see for ROM is that official Sega carts have one or two 16-bit ROMs, while unlicensed and bootleg carts (which are usually the ones with standard screws; especially common are early Electronic Arts games with the yellow tab) tend to have two or four 8-bit ROMs arranged so that they act like one or two 16-bit ROMs (i.e. they put one on each half of the data bus and connect their !CE and address pins together so that they activate and read just like a 16-bit ROM would).
edit: minor detail I guess, but it's worth noting that when you connect an 8-bit memory to a 16-bit system, the memory address shifts left one bit relative to the system address, i.e. if you read from $200006, you're actually reading SRAM address $000003. Likewise, the signal names for the address bus will be off by one - SRAM A0 = 68K A1, and so on. This is because 16-bit systems don't require an A0 output - the selection is made by only reading half of the data bus as mentioned above.
edit: further edited to remove some faulty reasoning regarding !UDSW/!LDSW
